thank for ur reply first
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what is "analog PAD" do you mean?
you mean that maybe I can design an drive buffer to drive the "analog PAD",so looks like below
------ ----------------- ---------
|PLL|----|output driver|---|analog pad|
|___| |__________| |_________|
is there any misunderstanding by me?
actually I'm considering to do the measurement on the way of wafer testing so that it can avoid the disturbance by the package.then have i design the PAD and ESD circuits?