Hi,

As the PCI-Express standard is not openly available, it may be useful if you provide more information on the jitter spec.

I presume you are talking about sinusoidal jitter in the jitter tolerance specification, right? If so, in most serial link standards (GbE, FC, etc), there is a jitter tolerance mask defined for sinusoidal jitter, which I thought would be the same for PCI-Express.

In your post, ist it this jitter tolerance mask you are talking about?

Paul

Hi,

I'm sorry but I don't still don't understand your question...

What do you mean by "there will be a filter for the jitter"? Do you mean there is an external filter for the jitter, or are you talking about your receiver frequency response?

The sentence "the calculated phase noise will be send through the filter, and be integrated over that frequency range. THat's how to get long term jitter. (phase jitter) " is even less understandable to me... I guess you are talking about cycle-to-cycle jitter versus n-cycle jitter, right?

Maybe providing some references would help my understanding.

Sorry

Paul

OK, I guess I got it now... You must be talking about the duration which you should consider for jitter accumulation in your receiver oscillator. John McNeill's paper "Jitter in ring oscillators" JSSC 1997 shows that this depends on the loop bandwidth of the PLL the oscillator is sitting in (I presume that's your case). Does this answer your question? Somehow I still don't see the relationship with the PCI-Express spec... Your lower bandwidth bound will be somehow defined by the jitter tolerance specification, but I guess there is no upper bound defined.

Notice McNeill's paper supposes the loop bandwidth is large enough to neglect correlated jitter sources, as considered by Hajimiri in "Jitter and phase noise in ring oscillators", JSSC 1999, which is OK in most designs and today's technologies.

Please let me know if I understood your question correctly this time...

Paul

Right, the lower bound is given by the jitter tolerance spec (i.e. up to what frequency the loop has to track jitter).

In SONET, the upper bound for the loop bandwidth is given by the jitter transfer spec, which defines how much of the input jitter is transferred to the output signal. This is of importance in systems using repeaters, which does not apply for short-distance protocols like PCI-Express. The maximum loop bandwidth in that case is not specified, but it definitely cannot be infinity, because there cannot be jitter accumulation exceeding the oscillator frequency.

Paul

Maybe my statement was a little strong, but remember that in Hajimiri's formula:
sigma_jit = kappa * sqrt(delta_T)
sigma_jit -> 0 when delta_T -> 0, i.e. when considering very high frequencies. Intuitively speaking, I would say that in the case of jitter at frequencies much larger than the bit rate, the average jitter over one bit period tends to zero.

Does that sound reasonable?

Paul