Hi everyone..
                I have a vco operating at 3G. I wanted d/dt, d2/dt,d3/dt, (first , second and third)
drivative of the output waveform. I am using Verilog A. In the trasient analysis some
nodes go to very high voltages for the obvious reasons. so simulator stops.
                  These high voltages are due to the fact that 1. frequency of waveform is high (2)
in the begining I use some step voltages to start the oscillator.
                   Is there anyway to tell the transient to not take those initial things into account,.
Any help!
           Thanx for your time ...
              jefkat