Dear All:

        Now I design a unitgain buffer , The input common mode is Vdd/2 ,(vdd=2.5) , But the output common
mode is fixed 0.5v,it indepant with VDD , Vdd has 5% variation . And the Buffer's SFDR must large than 65dBc .
I using source follower to do this project , becasue source follower is open loop structure , It's poor SFDR , I hace done 57~60 vary with VDD , Does any have good idea or command to improve the SFDR ? Thanks . This is very urgent for me , Thanks