Hi Guys:

Attached is the buffer I had used  in isolating the ,3.8GHz-3.1GHz,VCO output. I find that this buffer provides comparable good output swing, to the ratio of power consumption in comparison with the common source follower stage. I'm using a resistive degeneration load, with respect to the current source. The questions are:

1. Does this degenerative load needs to be 50 Ohms, currently it ranges to 500 Ohms in my design?

2. The find that the phase noise of the VCO increased due to the increased number of transistors, does one take into account of the phase noise of the core circuitry in a VCO design or the whole buffer and VCO integration?

3. I find that for both of the types of the buffer stage the output is attenuated around 50mV from the input, I can't seem to boost the gain to unity or larger, is this quite normal ?

4. Finally in measuring the S21 and S12 characteristic of the buffer, I understand I need to terminate the input and output with ports, where output port is 50 Ohms terminated, the input of this buffer comes from a autonomous VCO, How much impedance shall I terminate in the input?.

I would really appreciate your kind help in resolving this issues. Thanks in advance

Rgds

Any source follower (in this case PMOS) will be a bit lossy at high frequencies.

Unusual architecture - the gate of the top transistor does not really seem to have a well defined operating point?

If this is an AC coupled system, why not just use an NMOS source follower?

Also, are you including some estimated parasitics at the moment? At 4Ghz (more or less) this is going to affect things in a big way.

Jerry