Designer’s Guide Community

‹ Previous topic | Next topic ›

Pages: 1

question on the dc offset correction loop in LA (Read 2023 times)

dandelion

Community Member

Offline

Posts: 98

question on the dc offset correction loop in LA
Feb 06^th, 2006, 6:34pm

Hi,
I have aquestion on the dc offset loop for a high gain amplifier, e.g., a limiting amplifier.

We know in the high gain amplifier design, we always need a dc offset loop to reduce the mismatch effect. It consists of a low pass filter which is to extract the dc level and feed abck to the input port. I noticed in many designs, there is a amplifire located in this dc offset loop path. Pls. see the attached file, Fig.1.

Can anyone help me to understand the function of this amplifier? Is it to isolate the crosstalk of the input/output? Or it is to isolate the twop poles of the input and feedback loop? Or anyother functions???

Thanks in advance

limiting_amplifier.pdf

IP Logged

Paul

Community Fellow

Offline

Posts: 351
Switzerland

Re: question on the dc offset correction loop in L
Reply #1 - Feb 7^th, 2006, 4:26am

Hi John,

some figures on limiting amplifier offset compensation show passive feedback mechanisms to do so, but frequently you build a two-input LA input stage, where the first input receives the signal and the second input the offset compensation signal (see document below, p.10, on the left). By two-input input stage I understand a differential input in case your TIA output is single ended, respectively a dual-differential input stage if your TIA delivers a differential signal.
http://www.imec.be/esscirc/esscirc2001/C01_Presentations/41.pdf
Notice that the amplifier shown in your schematic corresponds to the right half of the input differential pair, not to the amplifier shown below. The latter is added to minimize the loading of LA output, respectively in this case of the intermediate stage.

Paul

IP Logged

Pages: 1

‹ Previous topic | Next topic ›