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zychang

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how to generate a negative reference voltage
Feb 16^th, 2006, 9:01am

Hi all,

I'm currently designing a switched-capacitor circuit for a mixed-signal system. It is a multiply-by-2 circuit using fully differiential opamp. Now, I have a little question on the negative reference voltage for the SC and I'm just wondering if there is somebody know about this issue by any chance. The positive reference I have is coming from a bandgap reference circuit, which also supply the current needed in the opamp. I just have some difficulty to generate the negative reference voltage. I have seached on the web for some time but no solution found so far. I thought maybe I could use an opamp sitting in a feedback configuration to invert the positive voltage, but it seems to me an very inefficient way.

Any comments will be well appreciated.

Mike

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zhc

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Re: how to generate a negative reference voltage
Reply #1 - Feb 16^th, 2006, 10:59am

Hi,

One common way is to not generate negative reference voltage at all. You
can configure the switches in a way that dumps negative charge to the summing
node. You need two copies of the switched capacitor resistor for this.

Some other people just use Vdd and GND as the positive and negative reference.

Best regards,

zhc

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Paul Community Fellow Offline Posts: 351 Switzerland	Re: how to generate a negative reference voltage Reply #2 - Feb 16^th, 2006, 12:43pm Hi, I don't fully understand your question. You are designing a fully differential circuit, so the negative reference should be readily available by cross-connecting the capacitors. Am I missing something? Paul
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zychang

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Re: how to generate a negative reference voltage
Reply #3 - Feb 17^th, 2006, 7:39am

Thanks for your comments, guys.

Ok, I'm trying to describe it in more detail. What I'm designing is a multiply-by-2 circuit. As it is bit like the 1.5bit stage in pipline ADC, a positive reference and a negative reference voltage are needed. I can think of two ways of generating these voltages: one is to build a differential reference voltage, like the one mentioned in Razavi's book, so that a negative reference voltage can be realized by cross-connect the capacitors, just like you said in your post Paul. But I found some difficulties in designing the differentianl reference voltage circuit, so I just moved to the second approach(maybe not commonly used by people around but this is the way I can think of since I just started in this area), which is to build two single-end reference voltages. Now, I have no problem building the positive one, but I just have no idea how to realize the negative one. I don't know if the cross-connecting thing is still working here. Also, I have found some thesis on pipeline ADC from the websit of P.Gray's group in UC Berckley, some of them seem to use capacitors array to provide the reference voltage which is a quite different idea from mine. So, if you can give me some advice or reference or what people normally do in this topic, I will very appreciate it.

thanks again.

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steven

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Re: how to generate a negative reference voltage
Reply #4 - Feb 17^th, 2006, 12:16pm

zychang wrote on Feb 17^th, 2006, 7:39am:

Thanks for your comments, guys.

I can think of two ways of generating these voltages: one is to build a differential reference voltage, like the one mentioned in Razavi's book, so that a negative reference voltage can be realized by cross-connect the capacitors, just like you said in your post Paul. But I found some difficulties in designing the differentianl reference voltage circuit, so I just moved to the second approach(maybe not commonly used by people around but this is the way I can think of since I just started in this area), which is to build two single-end reference voltages. Now, I have no problem building the positive one, but I just have no idea how to realize the negative one. I don't know if the cross-connecting thing is still working here.

Hi,

Sorry my interruption to your question: since you said you had no problem in producing the positive one and according to the book, you should be able to get the negative one, right? I think I must have misunderstood you. Which section of Razavi's book reference you are referring to (Chapter, page etc)?

Regards

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zychang

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Re: how to generate a negative reference voltage
Reply #5 - Feb 17^th, 2006, 1:04pm

Hi steven,

The positive one I use is coming from a very simple bandgap circuit, which can be found in P391 (Fig. 11.20) in Razavi's book (Chapter 11). I was just wondering if it is a good idea to use two single-end reference voltage generators for the multiply-by-2 circuit. I was thinking of using a differential reference voltage generator, which is quite similar to the one mentioned in that Chapter (Fig 11.32 p399), but I just had some difficulties there, such as the design of the amplifer (A1 as in the book). would u please let me know what reference circuit is normally used in this kind of situation.

Best regards

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Paul

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Re: how to generate a negative reference voltage
Reply #6 - Feb 20^th, 2006, 1:00pm

Coming back to the differential design, it seems one of us is missing something... In a differential design, you have to have to nodes for the reference voltage, which I will call Vrefp and Vrefn. If you connect your capacitors in a straight connection (C1 to Vrefp and C2 to Vrefn) this will make +Vref. If you cross-connect the capacitors (C2 to Vrefp and C1 to Vrefn), you will get -Vref.

You don't need to build a negative voltage reference on-chip. (Vrefp, Vrefn) could be (VDD, GND) as suggested before, it could also be (VDD/2+x, VDD/2-x) where x is a voltage to be defined in your design. One solution to obtain these voltages would be the implementation of a bandgap voltage reference generating two copies of a CTAT (constant to absolute temperature) current. Sending these CTAT currents into two different size resistors, you get two very stable voltage references of different values. This would correspond to your two single-ended voltage references, I guess.

Paul

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