Designer’s Guide Community

jason_class

Community Member

Offline

Posts: 39
singapore

about nmos and pmos
Mar 02^nd, 2006, 4:27pm

Hi Murphy and All

I would need some advice on Vfb and Vt for a practical nmos and pmos,
I am thinking that when an nmos is at 0V for the gate voltage, what will the nmos condition be.
Is it at flatband , depletion or?
I am thinking if device designer MUST always design pmos and nmos to work at exactly flatband when the gate voltage is applied to turn the device off.
This is because I am trying to understand how Vt requirement is when gate voltage is 0V for nmos. Has nmos reached just nice at flatband when its gate at 0V, so any increse in Vg will just turn the nmos on by supplying the voltages across depletion region and inversion charrges?
or it still need some voltage to make it flatband ?

Kindly enlighten
Thank you Murphy and everyone here

best regards
Jason

Back to top

IP Logged

Croaker

Senior Member

Offline

Posts: 235

Re: about nmos and pmos
Reply #1 - Mar 2^nd, 2006, 8:02pm

jason_class wrote on Mar 2^nd, 2006, 4:27pm:

Hi Murphy and All

I would need some advice on Vfb and Vt for a practical nmos and pmos,
I am thinking that when an nmos is at 0V for the gate voltage, what will the nmos condition be.
Is it at flatband , depletion or?

That depends on whether it is an enhancement or depletion device.

jason_class wrote on Mar 2^nd, 2006, 4:27pm:

I am thinking if device designer MUST always design pmos and nmos to work at exactly flatband when the gate voltage is applied to turn the device off.
This is because I am trying to understand how Vt requirement is when gate voltage is 0V for nmos. Has nmos reached just nice at flatband when its gate at 0V, so any increse in Vg will just turn the nmos on by supplying the voltages across depletion region and inversion charrges?
or it still need some voltage to make it flatband ?

No, the device does not have to be at flatband at Vgs=0 V - that assumption is messing you up. It is however true that the traditional definition of Vth is the voltage it takes to go from flatband to having the same carrier concentration as the substrate (but with the opposite polarity).

Any application of a voltage is going to affect the region under the gate whether it's at flatband or not. More voltage causes more inversion. Think of the flatband condition as the neutral condition, where the surface has the same carrier concentrations as the bulk. It doesn't matter whether the device is flatbanded at Vgs=0. If the device is already a bit depleted at Vgs=0, it just means a lower voltage is required to invert the channel. This is what you'd like for a low Vth device. If you want a depletion device you make it so the channel is already inverted at Vgs=0.

Basically the flatband voltage is just part of the threshold. This is what Vfb is all about...the NMOS device is already a bit depleted because of the work function difference and trapped charges, so Vth is lower that it would be if you didn't account for work fn. diff. and trapped charges.

The higher Vth is, the smaller the amount of inversion will be at 0 V. Different devices will have different Vth values; no problem.

Cheers,
Marc

Back to top

« Last Edit: Mar 3^rd, 2006, 4:56am by Croaker »

IP Logged

jason_class Community Member Offline Posts: 39 singapore	Re: about nmos and pmos Reply #2 - Mar 3^rd, 2006, 5:07am Hi Murphy Thanks a lot! Now am digesting your words Will be writing back soon best regards jason
Back to top	IP Logged

Croaker

Senior Member

Offline

Posts: 235

Re: about nmos and pmos
Reply #3 - Mar 3^rd, 2006, 10:10am

<follow-up to PM>

The surface under the gate could be accumulated, depleted, or inverted at Vgs=0.

Equilibrium means there is no voltage applied. E.g. a p-n junction is in equilibrium until you apply a voltage.

The device does not have to be at flatband. In fact, the device is not at flatband because of the Vfb term; when Vgs=0, the device is already a bit depleted, and so the effective Vth is lower.

If the device starts at flatband when Vgs=0, maybe Vth=1 V.
If the device is already depleted when Vgs=0, maybe Vth=0.5 V.

Think of Vth as the Vgs voltage you need to apply to achieve inversion. It can be larger or smaller depending on how inverted the channel is at Vgs=0. If you get a headstart (some inversion), Vth is smaller.

*IF* the device is flatbanded when Vgs=0, Vgs=Vth=2phi + Qchan/Cox will invert the channel. However, the work fn. diff and trapped charges gives you some inversion so Vgs=Vth=Vfb + 2phi + Qchan/Cox will invert the channel. This Vth is smaller since Vfb is negative. The applied Vgs to invert the channel is lower because the device was a bit inverted to start with.

Cheers,
Marc

Back to top

IP Logged

jason_class

Community Member

Offline

Posts: 39
singapore

Re: about nmos and pmos
Reply #4 - Mar 3^rd, 2006, 2:32pm

Hi Murphy and All

The original question was...................................
===========================================================================
<<Basically the flatband voltage is just part of the threshold. This is what Vfb is all about...the NMOS device is already a bit depleted because of the work function difference and trapped charges, so Vth is lower that it would be if you didn't account for work fn. diff. and trapped charges. >>

I was stuck when I read about work function difference makes nmos enhancement devide to be in depletion. So it is at condition nearer to inversion condition. So this makes it a low Vt device as you said.
As I read from text, semiconductor material when not biased is in equilibrium. So if nmos has its gate at 0V bias, do we treat it as in equilibrium ? or not in equilibrium since Vg is at 0V?
I am not sure at floating node for the gate is at equilibrium or Vg=oV is at equilibrium?

My doubts arise from this part. As the text mentioned at equilibrium, the nmos device is a depletion condition(due to work function difference). So I know slightly increase the vg will be sufficient to turn on the nmos device. Then I wonder the equilibrium means when the gate is at floatng node or 0V or what kind of value?

If Vg=0V is the equlibrium state for nmos, then slight increse of Vg will invert the area below the gate. But the slight increase is definitely smaller than the Vt we define as Vfb +V(depletion region)+V(inversion)
See below,

Slight increase vg= V(inversion)
Vt　= Vfb + V(depletion region)+V(inversion)

Vt > Slight increase vg
So when we calculate for current Ids, we would use the normal equation with the square term of (Vgs-Vt).
However, when we dont bias the gate(equilibrium), the nmos is at depletion, so Vt should be just V(inversion) for this case.
So Vgs-Vt in Ids equatin should be replaced by Vgs-V(inversion).

But I know it is not, we still use Vt as Vfb +blah blah

Since the nmos is already at depletion, why must we account for Vfb to make it flatband and then still applied more gate voltages to supply the depletion region and then inversion charge?

I know my thought is wrong.
I think my main confusion is Vg =0 is equlibrium or not and then from there, I can try to understand why must we always make the nmos to be at flatband and then from flatband to depletion and to inversion(based on Vt equation).
Components of Vt:
Vfb to make nmos from depletion to flatband
V(depletion) is to make nmos from flatband to depletion
V(inversion) is to make the inversion sheet
Right?

Since nmos is already depletion when it is in equlibrium , why not we just just consider Vt as V(inversion)?
<Vgs-V(inversion) term in Ids equation>

Kindly help
Thank you Murphy and my apology for the trouble.
==========================================================================

Thank you so much Murphy for the detailed explanation. I will write back later if there is any more doubts.
The answer is excellent!

best regards
Jason

Back to top

IP Logged