Designer’s Guide Community

Pages: 1 2 3 ... 16

Subject	Started by	Replies	Views	Last post
Verilog-A Convergence issues with diodes and big netlists	Camillo	1	39	Apr 8^th, 2019, 8:42am By: Geoffrey_Coram
Verilog-A model extraction in ICCAP for Spectre	Ziauddin	1	207	Jan 31^st, 2019, 7:12am By: Geoffrey_Coram
Should I use an optocoupler here?	sunrise7747	0	562	Apr 18^th, 2018, 1:56am By: sunrise7747
device local mismatch	dog1	7	1913	Feb 7^th, 2018, 6:21am By: Tako
Diode spectre model	Palz	4	1858	Dec 21^st, 2017, 7:48am By: Andrew Beckett
Transistor model with variable gate capacitance	frasheed	7	2324	Nov 3^rd, 2017, 7:19am By: Geoffrey_Coram
Silvaco C-interpreter F.NKEG complex refractice index and quantum wells	JayOcad	0	719	Aug 29^th, 2017, 12:41pm By: JayOcad
Model of VCSEL. I'm begging you to help an amateur. Thanks a million	lummiuster	6	2622	Aug 11^th, 2017, 11:39am By: Ken Kundert
rppd in cadence	VK	3	1995	Jun 7^th, 2017, 8:28am By: Geoffrey_Coram
For MOS Cap, is the a depletion region in MOS when VFB < VGB < 0?	mpig09	2	2077	Jun 5^th, 2017, 2:49am By: mpig09
Spectre to LTspice conversion	Daves0402	0	1005	Apr 22^nd, 2017, 7:16am By: Daves0402
TFETs « Pages 1 2 »	nosrat	19	11271	Apr 6^th, 2017, 9:38am By: zeropond
Lack of systematic approach. Frustration. [RANT]	physixer	1	1212	Apr 3^rd, 2017, 8:40am By: physixer
drain current prediction using EKV equations	lpalocko	0	895	Feb 16^th, 2017, 7:26am By: lpalocko
libGL error in Sentaurus TCAD	hameruda	0	948	Feb 5^th, 2017, 7:05am By: hameruda
Igfinfet (independent gate finfet)	Bakr	1	1443	Nov 21^st, 2016, 5:06am By: Geoffrey_Coram
ESD device characterization	AS	1	1716	Oct 6^th, 2016, 10:25am By: Geoffrey_Coram
Re: Any TCAD users here (device simulationg question)	Ria	0	1397	Jul 21^st, 2016, 10:39am By: Ria
Poll: Any TCAD users here (device simulationg question)	esprit	4	8213	Jul 21^st, 2016, 10:05am By: Ria
Forum activity and other communities?	physixer	1	1691	Jun 27^th, 2016, 8:10am By: Geoffrey_Coram

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