Hi,

The classic paper by Bult and Geelen on gain-boosting amps "A Fast Settling CMOS Op Amp for SC Circuits with
90-dB DC Gain," JSSC, Dec. 1990 presents measurement results of the gain and phase response of the prototype opamp.

How do they actually measure the gain of such a high-gain opamp.

Signal ~ 4V, Gain ~ 90 dB => vin(diff) ~ 100uV.

Offset alone would make it very difficult to do an "open-loop" input-output gain measurement.

As a student, I trimmed offsets of some old-fashioned BJT opamps once or twice using resistive pots.
However, the approach is not very easy to implement and it would be hard to measure several different
chips. How would one get rid of the offset while measuring the gain of such a high-gain CMOS opamp.

In fact, how would one actually do the lab measurement of such a high gain opamp even if there were no
offset. In simulations, one can do this very easily, but perhaps there is a good method for measurements too.

Could someone suggest a good method ?

Thanks
Vivek

I've never done this, but I remember somebody in my old group doing something similar using a 100,000:1 (or whatver is approriate) resistive voltage divider.  If you are doing AC gain, you might be concerned with the phase shift through the divider.

Hi David,

Thanks. But do you have a copy of AN-2? I believe it is one of those vintage app notes which
are no longer available onthe National website.

I would be interested in a copy if you have one. Any other doc with similar information will
also be helpful.

Thanks
Vivek