If the oscillator is locked you can use PSS. If it is not locked PSS will not converge because there are two signals present at noncommensurate frequencies (the drive signal and the oscillator).

You probably want transient analysis.

-Ken

It is a measure, but probably not a very good measure. If I were you I would create a drive source in verilog-a that slowly sweeps its frequency, and then run a long transient where you use another verilog-a module to sample the oscillator output signal at the exact same frequency as the drive source, then plot those samples. The waveform of samples will go completely flat when the oscillator is locked.

If you don't want to use verilog-a, you can run a series of transient analyses where you slightly change the drive frequency on each. Then set outputstart (tran option) to eliminate the initial transient from the results and use strobing to sample the waveforms at the drive frequency. Plot the output of the oscillator from each transient. When locked the output waveforms will be completely flat.

-Ken

Typical you will characterise your circuit by an amplitude/frequency map of locking versus nonlocking. The best testbench is here a transient simulation where either the frequency is slowly sweeped and the amplitude is fixed or the frequency is fixed and the amplitude is sweeped. I prefer to use the second case and sweep the amplitude via the exponential damp factor of a sinewave source. The amplitude transition point could be observed by multiplying the the source with the oscillator and lowpass filtering. That could be done by an AHDL (VerilogA). The locking condition could be defined as the frequency difference being less than e.g. 1%. Because only a complex multiplication of the source and the oscillator (both I and Q) gives a clean signal the lowpass filtering corner frequency and the amplitude rise should have some ratio.