If there is no event passing from the digital side to the analog side, WHY would you want your analog simulation to slow down?
If you are using a
Code:reg Da = 0;
always @(posedge Din) Da = 1;
always @(negedge Din) Da = 0;
analog V(Aout) <+ Vdd*transition(Da,td,tr,tf);
you'll force at least two timesteps after each transition,
one at $abstime+td
and the other at
$abstime + td+ tr (rising edge)
$abstime + td+ tf (falling edge)
but if there is no event, there need be no analog time steps..
so your simulation is done faster.