Dear all,
I am a new comer to this forum. Let me first give my honest thanks to Ken for his great works. Recently, I read the paper by Ken"Predicting the phase noise and jitter of PLL-Based frequency synthesizers", It is really a wonderful work for pll disigners. Afer reading the paper, however, I am confused by some questions maybe due to my short knowledge. I know Ken is very busy, so I hope other experienced experts who read the paper can give me some hints.
1) with pss and pnoise analysis, I ploted the phase noise curve. In fact the curve is
L not S
phi, My first question is how can I get a curve of S
phi?
2) with the curve of
L, acorrding to Ken's paper "Predicting the phase noise ...", page 33, we can calculate the jitter of the circuit for example a VCO. But I am confused by the fact that: when I used
L=-71dBc/Hz at 100KHz from the carrier (f
0=409MHz), the jitter is 3.39ps; when I used L=-42dBc at 10KHz from the carrier (f
0=409MHz), the jitter is 9.59ps. I am confused by the way to calculate jitter according to Ken's paper. Which one can I accept as my jitter? What's the exact meaning of the jitter culculated from equation(74)? It is the period jitter just at the offset frequency "point" or some thing else?
3) I find another paper about conversion from phase noise to jitter.
http://www.maxim-ic.com/appnotes.cfm/appnote_number/3359. From the paper, the jitter is calculated by integrating
L from for example f
1 to f
2. What's the difference between Ken's method and maxim's?