Dear all,

I am a new comer to this forum. Let me first give my honest thanks to Ken for his great works. Recently, I read the paper by Ken"Predicting the phase noise and jitter of PLL-Based frequency synthesizers", It is really a wonderful work for pll disigners. Afer reading the paper, however, I am confused by some questions maybe due to my short knowledge. I know Ken is very busy, so I hope other experienced experts who read the paper can give me some hints.
1) with pss and pnoise analysis, I ploted the phase noise curve. In fact the curve is L not S_phi, My first question is how can I get a curve of S_phi?
2) with the curve of L, acorrding to Ken's paper "Predicting the phase noise ...", page 33, we can calculate the jitter of the circuit for example a VCO. But I am confused by the fact that: when I used L=-71dBc/Hz at 100KHz from the carrier (f₀=409MHz), the jitter is 3.39ps; when I used L=-42dBc at 10KHz from the carrier (f₀=409MHz), the jitter is 9.59ps. I am confused by the way to calculate jitter according to Ken's paper. Which one can I accept as my jitter? What's the exact meaning of the jitter culculated from equation(74)? It is the period jitter just at the offset frequency "point" or some thing  else?
3) I find another paper about conversion from phase noise to jitter. http://www.maxim-ic.com/appnotes.cfm/appnote_number/3359. From the paper, the jitter is calculated by integrating _L from for example f₁ to f₂. What's the difference between Ken's method and maxim's?

Dear Ken,

Thank you a lot for your explanation. According to your answer, I reread your papers and some related materials today. I also resimulated my VCO. I got the phase noise plot (please see attachment).  The phase noise ramp down by -30dB/dec until about 1MHz. Offset frequency above 1MHz, the slope of the phase noise  increases to some value but still smaller than -20dB/dec. The phase noise becomes flat above 10MHz. Normally the phase noise caused by the white noise proportional to 1/f². But in my simulation result, there is no abvious area where the phase noise is proportional to 1/f². Does this mean the flicker noise dominates too much than the white noise in my VCO over a wide frequency band?

2) In Ken's paper, (74) gives rms period jitter for a VCO, caused by thermal noise and shot noise. This does not include the effect of 1/f noise.
3) There are many different PLL jitter specs. To understand the relationship among them, have a look at:
David C. Lee, "Analysis of Jitter in Phase-Locked Loops",
IEEE Transactions on Circuits and Systems II, Volume 49, No 11, Nov 2002, Pages 704-711