1. You have to have a configuration view for your testbench, but that's what
  you have to have anyway if you use AMS Designer.

2.a. Create a symbol for your verilog module.
3.a. Recompute the design hierarchy with the 'Update'
    button of the Hierarchy Editor.
4.a. A new cell view will appear after that.
    Use then the 'View to Use' popup menu
    in the 'View to Use' column, select 'Set Cell View
    -> Source File'.

2.b. Import your Verilog modules through 'Verilog In'
    via the CIW->File->Import->Verliog' option.


Bernd

I still run into this issue, ie. the verilog files from the digital group are not convenient to import into the ADE 'AMS Designer' flow.

Currently, I keep all of the verilog modules from the digital group in a separate directory from my dfII analog friendly directory structure.  When importing new digital modules I:
1. Create a new empty verilog file and close it, this sets up all of the proper cadence binary files.
2. Make a symbolic link to the actual verilog module, from the command line, overwriting the created verilog file.
3. Create symbol for the new module. Use 'Create Cellview->from cellview->verilog to symbol.  Edit symbol artwork to clarify functionality.
After these three steps the module is imported and easy to include in simulations.

Some benefits of this approach are compatibility with other simulators: ADS and VCS (which the digital group uses).  Also this allows SubVersion to track any verilog file changes without allowing SubVersion into the dfII directory structure where it can make a mess.  

The downside, is that this process requires too many clicks.  Any suggestions to improve the flow would be appreciated?
Thanks,
Makelo