I also recently came across a paper on ring oscillators wherein the author avoids using a tail mos in his delay cell for he says that would "increase the output noise via up-conversion". What does this mean? by-the-way the paper is by Yalcin A. Eken and John P. Uyemura, "THE DESIGN OF A 14GHZ I/Q RING OSCILLATOR IN 0.18μMCMOS", ISCAS 2004.

When the delay cells in ring oscillators are hard switched then you are basically just charging a capacitor w/ the tail current (slew rate limit).  Noise of the tail is very important here, because the tail current directly modulates the delay.  I agree w/ Vivek that you should only see tail noise from a diffamp if the circuit is unballanced.  The unballance can come from asymmetry in the circuit topology or from an asymmetric operating point (this is what's happening in ring oscillator delay cells).
-Dan

PS- a good paper that explains noise in ring oscillators:
Abidi, A.A.; Samadian, S., Phase noise in inverter-based & differential CMOS ring oscillators
Custom Integrated Circuits Conference, 2005. Proceedings of the IEEE 2005 , vol., no.pp. 457- 460, 18-21 Sept. 2005

Hi nandagovind,

I had missed looking at your second post and thought that you were talking of an opamp (small-signal). In a ring oscillator, you have asymmetry of operating point as Dan very clearly explains.

As for upconversion, you should consider that applying a signal at rate fs on the diff stage inputs results in a signal of 2*fs at the tail. One more paper dealing with this issue is written by Hegazi, Sjoland and Abidi (JSSC, Dec. 2001).

Regards
Vivek

From your first post:
"i was simulating the noise performance of a mos diffamp, and i found that the tail mos current source contributes significantly to the 1/f noise measured at the differential output. why is this happening? i always thought the tail mos doesnt contribute to overall noise as its noise current gets evenly distributed between the 2 branches and hence gets canclled off when we view the differential output."

Your logic here is correct.  If the tail noise spilts evenly to both sides, then you shouldn't see it in the differential output.  However, this is only the case when the differential input is zero (or sufficiently small).  When the differential input is large the split will not be equal and tail noise will be present in the differential output.  This is what we mean by an "asymmetric operating point".

How are you simulating the noise performance?  If it's just a standard AC noise sim (not pss+pnoise) w/ zero differential input then you should not see tail noise at the output if the circuit topology is symmetric.

Hello

I have similar question as Dan:
How do we do noise simulation in above systems
other than .AC noise simulation.

Any reference material?
Thanks in advance,