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Digital Sigma Delta Modulator for Frac N PLL (Read 1996 times)
timmc6
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Digital Sigma Delta Modulator for Frac N PLL
Jul 18th, 2006, 6:23am
 
Hello,

I am trying to design a Frac N PLL using an all digital ΣΔ modulator.  All literature I have found so far refer to the ΣΔ as an ADC or DAC, but it seems to me that the modulator should have a digital input and digital output.  Can any help clarify this, and maybe point me to some literature that talks about the design of ΣΔ's used in Frac N PLL's?  Thanks.

Tim
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Aigneryu
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Re:  Digital Sigma Delta Modulator for Frac N
Reply #1 - Aug 4th, 2006, 8:32pm
 
Consider the oversampling ADC theory, and implement it in a "numerical" form.
Just treat the modulator as a numerical type ADC, which means you input a fractional
number in binary format then you get a series of modulated output bit patterns.
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