Geoffrey_Coram wrote on Aug 1st, 2006, 10:01am: Quote:I'm writing my own modeling language,
Why re-invent the wheel?
I started writing this thing a couple of years ago as a hobby and before I realized that the Verilog spec was available and that it had similarities to the language I created.
I am interested in source code generation and the ability to optimize derivatives in order to avoid duplicate calculations.
e.g.
ib = Is*(exp((vb-ve)/(n*VT))-1)
d_ib_d_vb = (ib+Is)/(n*VT)
d_ib_d_ve = -d_ib_d_vb
instead of the machine generated
ib = Is*(exp((vb-ve)/(n*VT))-1)
d_ib_d_vb = Is*exp((vb-ve)/(n*VT))/(n*VT)
d_ib_d_ve = -Is*exp((vb-ve)/(n*VT))/(n*VT)
and I can verify the resulting source code is correct.
Quote:You almost certainly need to have if() statements; the only ones that can cause trouble are ones where the condition depends on the unknowns (voltages). Ones that depend on parameter values can't cause convergence problems, since the if() does not toggle between true and false during iterations. You'd have a very weak language if there were no if statements, and your models would run extremely slowly, because people couldn't shut off advanced model features by setting parameter switches. Eg, if you had breakdown in a diode, you calculate ISR*(exp(-(v+BV)/vt) - 1.0). Without an if() statement, you have to calculate the exponential even when ISR=0.
You make an interesting point about reliance on operating point, and that is something I am wrestling as to whether should be allowed. Thanks for the elaboration off of your original post.
Quote:The symbolic derivatives can be accessed with the ddx() function. There's no way to override them; there's never a need to (except for compiler bugs).
Verilog is then insufficient for my requirements.