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Specifying a transistor-level block as digital
Aug 23^rd, 2006, 2:29pm

Is there anybody who know how to specify a block or a node as a digital block or a digital node?
I ran a simuation of PLL schematic which consists of some analog and digital blocks in AMS Designer environment.
(For reference, all blocks are in transistor-level. )
In SimVision window, I found that all signals were recognized as analog signal by the simulator.
I think there must be some way to specify a type of a block as analog or digital in AMS Designer.
I tried to find the soultion by looking up "Virtuoso AMS Designer Environment User guide", but I couldn't.

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bernd Senior Member Offline Posts: 229 Munich/Germany	Re: Specifying a transistor-level block as digital Reply #1 - Aug 24^th, 2006, 1:55am For AMS Designer you have to use the Hierarchy Editor (HED) to partition your design. So use the 'view to use' in the HED and select the appropriate view with the HDL description of your cell to define the view as digital. Bernd
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regulus0808

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Re: Specifying a transistor-level block as digital
Reply #2 - Aug 24^th, 2006, 8:41am

I know I have to use HED and I 've used it. What I am wondering is that, if there is a block which is described in transistor-level with real transistor models, capacitors, wires, and etc, there is a way that I can specify that block as digital block for the simulator to recognize the block as a digital block.
Or do I need to convert all transistor-level digital block into verilog-ams code to do that?

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ACWWong

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Re: Specifying a transistor-level block as digital
Reply #3 - Aug 24^th, 2006, 10:31am

regulus0808 wrote on Aug 24^th, 2006, 8:41am:

I know I have to use HED and I 've used it. What I am wondering is that, if there is a block which is described in transistor-level with real transistor models, capacitors, wires, and etc, there is a way that I can specify that block as digital block for the simulator to recognize the block as a digital block.
Or do I need to convert all transistor-level digital block into verilog-ams code to do that?

yes, you need to convert all transistor level digital blocks into digital code. Digital code includes verilog, vhdl, verilogAMS (without an analog section). this will make the AMS simulator treat the block as digital.
If you want to specify a NODE/Net as digital, you can do this by assigning a property to it in the schematic. Setting the netDiscipline property of a net/node to "logic" will make it digital, while "electrical" will make it analog.
If you're not running AMS from a testbench schematic, you can set nets/nodes to be analog or digital by using an OOMR (out-of module refernece ?)... an OOMR is simply a line of text in your netlist like:
logic Instance1.instance2.net1 (this will set net1 in intantce2 within instnace 1 to be digital).

cheers
aw

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jbdavid

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Re: Specifying a transistor-level block as digital
Reply #4 - Aug 29^th, 2006, 11:47am

If you use AMS_Ultrasim you can specify the transistor level block to be faster, but , last time I checked there were still a few incompatibilities
between AMS_ultra and AMS-D(spectre) the killer for me is not being able to use my own connect models and connect rules!!
and needing 9 spectre Tokens!!

Otherwise you need a decent library of Gate level models and you select those instead of the gate level schematic in the HED..
Its quite impractical to try to swap transistor level analog models with transistor level logic models..
jbd

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jbdavid
Mixed Signal Design Verification

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