caosl_zju
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hi,grosser First,the ac analysis is linear analysis,it cannot tell you fully about large signal response information,for example,load regulation in ldo.Generally,the pm is used to indicate the stability,but in some time,you cannot get the perfect stability performance even at good pm.The reason is large signal input has changed the quiescent operation point,the pm you get is good only at a point,not at all. Second, i guess the figure you attached is a load regulation response of ldo.Yes,indeed,under the larger output capacitor,the undershoot will be less.Remember that when a large step load current was added at output,the ldo can not regulate instantaneously to debase the voltage at gate of PowerMOS.assure pmos you use.At this time,who supply this large load current?Only output capacitor.The larger capacitor,the larger amount of charges.The current flows through the capacitor's equivalent series resitance(every capacitor has this resistance),the undershoot voltage give birth. So, you enlarge the pm will not change this undershoot voltage,just enfluence the stability and settling time.
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