This question is rather like "how long is my piece of string".

There are plenty of books which cover op-amp design well (see the Books link at the top of the page).

It's not just a matter of choosing the currents - your compensation needs to be correct too. There are too many variables to infer what the right thing to do is from your rather limited description.

Andrew.

If design that just applied pre-existing rules reliably produced innovative results we could write software programs to apply those rules and generate the designs.

Innovation requires understanding of what has been done before.. (that pesky theory you complain about) and a little creativity.

At least one design teacher I know thinks that the most successful approach is to simply throw the students at the problem... once they have the basic theory. If they are able to make the intellectual leap to becoming designers they pass.  Maybe even if they just get close..

so spend a little time to master the theory, then jump in and start designing.. analyze it, and start improving it..
at some point you'll get the hang of it.. or go into CAD..
Jonathan - I STILL don't want to be a CAD guy..  
 ;)

Hi,

As already pointed out in the previous replies, you need to figure out how to use concepts from theory and apply them successfully to design. There are three things I would like to recommend:

1. Understand what controls what, even for parameters that are not important for you lest your design makes them critical. e.g. What restriction do you have for the minimum compensation cap?

2. Avoid making lazy choices for critical components e.g. Cc=1 pF is so widely used by designers, often when a much smaller cap would suffice.

3. When compensating a two-stage opamp, avoid the temptation of compensating by increasing Cc aggressively. Instead, focus on increasing Gm of the second stage. It helps much more (the theory will tell you why).

A very good introduction to designing two-stage amps is provided in some tutorial lectures by Dr. Willy Sansen. I imagine that similar material may be found in Laker and Sansen, or on the web.

Regards
Vivek

avlsi wrote on Sep 13^th, 2006, 7:13pm:


Good to see that you choose the Cc based on noise.

Quote:


You should also take a look at the paper by Ahuja (JSSC, Dec. 83 I think). Since you mention that slew rate is not important to you (and I hope you have investigated this well), you can use this scheme. There are 2 drawbacks of this scheme:

1. An extra stage is added => more current, especially is slew rate matters (not in your case)

2. Systematic offset introduced as two current sources fight each other in the intermediate stage.

However, it should allow you to improve the stability of your opamp quite a bit for lower current and will also give a better opamp. If you are making a fully differential design, then the systematic offset issue may not be as severe. The big advantage here is the elimination of the RHP zero.

Quote:


A pity! How the pioneers would cringe. Let us remember that a couple of decades ago, there was only one kind of circuit design, and people would have laughed if you told them that this sort of design (now analog) could not be done systematically and optimally, even if it was not possible to automate it.

Quote:


Depending on the tool you use, you can usually just switch axes to log scale, e.g. Spectre allows plotting of gain in dB, and if I remember well, so does HSPICE.

Just a word of caution, if you sweep L or any other device parameter using an automated sweep, you may get incorrect results. I have not done this for a while, but the last time I did it, the results were wrong because tools don't handle the model binning correctly when you sweep a device parameter, and surely, things like  source/drain diffusion parasitics are not correctly scaled. So, you should physically change the device properties, re-netlist, and run simulations, or else create two separate devices with different L, and simulate them in parallel as separate instances.

Regards
Vivek

vivkr wrote on Sep 13^th, 2006, 5:03am:


2.
 The valuse of Cc basically depends on this "fnd=3GBW" to have phase margin of 70.
 Cc/CL=K*(gm1/gm2) where gm1 represents the input stage gm and gm2 is the 2nd
 input gm. I do not understand why Cc will have an effect on noise. All i know is about
 the input referred noise. Increase 1st stage of gm will reduce the input referred noise.
 
3.
 Hi,Vivkr.  To increase the gm of the 2nd stage will increase the system offset.
 Is that right ?
4.
 Can you kindly post the link which has the tutorial you mentioned ?  

Hi, I have a question of the system offset.
What else except mismatch would cause an offset?
Why the 2 current source would cause a system offset?
And I am doing a differential amp, but it still has an offset though I haven't include any mismatch in the simulation.
I think it is very strange. Cause though there is no DC offset, the transient output has different Vpeak in positive and negative sides.
What could be the reasons?
Thanks!