Hi,

We recently got our 12-bit ADC back from the fab. It gives at @12-bit level.

DNL = +/- 0.6 LSB (slightl
INL  = +/- 1.2 LSB

My first question is that is this peformance satisfactory or acceptable at 12-bit level ? (Our aim was to have 12-bit absolute accuracy). I looked into commercial ADC and I found a wide variety of DNL and INL numbers there.

The second question is that what tests I can conduct to get more insight as what´s not "relatively" working. We have switched capacitor gain stage, comparator etc in there.

the target was  to achieve 12-bit absolute accuracy (but wanted to know, with the numbers I described before, if it was still okay or almost okay to call it a 12-bit ADC)

Did not put any DFT (Design for test) things in there. I want to narrow down what was not relatively working E.g.

a)Is the opamp gain in silicon comparable to what we meausre in simulation (e.g 100 dB in simulation, but if 80 dB in silicon can spoil the results)
b) Was the capacitor matching good enough (1 to 2 percent) ? How do I know for sure ?
c) Are my capacitors non-linear over the voltage range, I am using etc ? (in silicon)

So its the kind of parameteric faults/features I am interested in knowing ? Any pointers in this regard would be helpful (e.g. test circuits I can design on IC to measure these)