I sometimes use pz analysis to figure out if the circuit is unstable - because you can tell this without having to analyse specific loops - it will analyse the whole circuit.
However, if you want to get information about the amount of margin, then stb is the man for the job. In addition to the reference that Ken posted, I believe there is an application note on
http://sourcelink.cadence.com . If you can't find it, file a service request, and your friendly Cadence application engineer can locate it for you.
Regards,
Andrw.