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blackbird New Member Offline I have no job... Posts: 4 china	about 1.5 bit Sep 28^th, 2006, 12:53pm 1.5 bit +-1/4Vref confused me.....why was that? can anyone tell me the detail or reference about it ?
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Faisal Community Member Offline Posts: 90	Re: about 1.5 bit Reply #1 - Sep 29^th, 2006, 8:17am 1.5b and 1/4 Vref refers to ADC static characteristics. Almost all the pipelined/cyclic ADC have some redundancy and can be 1.5b, 2.5b or higher (for accomodating comparator offsets). Pick any good book/thesis on ADC and you should get a starting point. ;)
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blackbird New Member Offline I have no job... Posts: 4 china	Re: about 1.5 bit Reply #2 - Sep 29^th, 2006, 8:12pm yes,I definetly read some papers about pipelined ADC...but I still don't know why.... Why do we need to shift precision levels 1/4 Vref to the right from the 2 bits per stage architecture ?
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jbdavid

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Posts: 378
Silicon Valley

Re: about 1.5 bit
Reply #3 - Sep 30^th, 2006, 1:14am

What do you mean "to the right"?

This is probably not easily described in a few words.. I used a diagram on page 14 of my bmas2002 tutorial that helped me describe it..
but I kept few details in it.. http://www.bmas-conf.org/2002/papers/bmas02-david.pdf

basically the x-axis is a single stage input range.. (-Vmax -> +Vmax)
and the y-axis is the stage output residue.. so the slope is the gain of the stage and the discontinuities show where the comparators switch state.

I found this to be the best tool to get my mind around the design..
Hope it helps you too.
jbd

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jbdavid
Mixed Signal Design Verification

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blackbird New Member Offline I have no job... Posts: 4 china	Re: about 1.5 bit Reply #4 - Sep 30^th, 2006, 6:51am thank you for your help, first of all. "to the right" means the decision-level of x-axis on 1/4 Vref which comes from a paper named A 10-b 20-Msample / s Analog-to-Digital Converter ,writen by Stephen H. Lewis, IEEE JOURNAL OF SOLID-STATE CIRCUITS. VOL. 27. NO. 3. MARCH 1992.
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