Hello

Is it possible to create more then one module in cell.
When I do it, elaboration fails and error message appears:

*E,CUCFUN (No HDL source,0|0): instance 'I1' of the unit 'MOD2' is unresolved in 'MyLib.MOD1:verilogams'.

MOD1 consists of two MOD2.

In the cell MOD1 I created 2 modules: MOD1 and MOD2.

Thanks in advance.

Pavel.

Yep..
in cdba - one CELL = one Module
if you put another modele inside it needs its own module.. module name MUST match the cell name..

But this is NORMAL in verilog design.. one file per module (name.v) except gates which will all be in one library file lib.v

Of course, this is just standard practice in most places I've seen and not a requirement, and not quire often enough recommended to new users to keep it fairly universal..