Pavel asks:

In "Top Down Modeling and Test Bench Development Verification Case Study: Pipeline ADC"http://www.bmas-conf.org/2002/papers/bmas02-david.pdf
There is an example of Verilog-A coding of Fully-Differential amplifier, but without CMFB.
Could you, please, give me any idea where to find Verilog-A examples that model the Fully-Differential amplifier with CMFB.

--------------------------------------------------------------------------------
-----------------------------------------------------------
The examples at this site are the best I know of so far..
-----------------------------------------------------------
Since the question of CMFB was never asked of me before, Let me outline what my first approach would be..
I thought my opamp model from that presentation included a "vcm" pin - assuming the CMFB was inside and sets the output common mode to the same voltage.  which  is, now that I think about it,  quite ideal. Have you thought about which non-idealities you'd want in the model?

I think I have done the output stage with two currents into "effective Rout" resistors.. with the mid point tied to VCM..
an alternative would be to tie the mid point to something else (vdd, or gnd?) and add a fixed current into both resistors based on the CMFB..
what was
I(outp,vcm) <+ V(outp,vcm) *Gout;
I(outn,vcm) <+ V(outn,vcm)*Gout;
I(outp,vcm) <+ V(outi) *Gout;
I(outn,vcm) <+ -V(outi)*Gout;
becomes
I(outp,gnd) <+ V(outp,gnd) *Gout;
I(outn,gnd) <+ V(outn,gnd)*Gout;
I(outp,gnd) <+ V(outi) *Gout;
I(outn,gnd) <+ -V(outi)*Gout;
I(outp,gnd) <+ Icm
I(outn,gnd) <+ Icm
where Icm can be a function of the difference between the desired Vcm and the actual..

Note though that the Gout is not a real admittance but a Norton equivalent one.., so you might need to use something other than gnd to set that point,
and with the smaller resistors the current flowing might not represent the real currents flowing in those branches due to CMFB circuit.