The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
May 18th, 2024, 5:51pm
Pages: 1
Send Topic Print
MOS flicker noise inversely proportional to WL ? (Read 5147 times)
Hunter_BJUT
New Member
*
Offline



Posts: 4
Beijing
MOS flicker noise inversely proportional to WL ?
Dec 03rd, 2006, 8:44pm
 
Hi, all,
   As all known, Mos flicker noise is  inversely propotional to W*L, Why?
From theory, this phenomenon is mainly caused by dangling bond formed between Si oxide and subtrate.
These bonds capature and release electrons causing flicker noise. However, while W*L increase, area increase,
and more dangling bonds are formed, more flicker noise should emerge. Why flicker noise is inversely proportional
to W*L?
   Best regards,
                                                                                                       F117
Back to top
 
 
View Profile WWW Hunter_BJUT   IP Logged
vivkr
Community Fellow
*****
Offline



Posts: 780

Re: MOS flicker noise inversely proportional to WL
Reply #1 - Dec 4th, 2006, 6:08am
 
Hi,

There are 2 effects that come into play:

1. The charge fluctuations in the channel due to trapping may be referred to the gate, thus dividing the current power
spectral density by Cox^2 when you try to obtain input-referred voltage power spectral density of the noise. More
W*L => more Cox.

2. As the gate area increases, more and more traps are active in contributing 1/f noise. Thus, the 1/f noise as an ensemble
average is reduced compared to the noise of a single trap.  Thus, for most cases excepting extremely tiny gate areas, the
noise contribution will smoothly go down as gate area is reduced. For the limiting case of a very small gate area, if there
is no trap, there will be absolutely no noise due to trapping, and if there is a single trap, then its noise will be higher than what
you may expect from the standard formula.

Note that the exact origins of 1/f noise are not completely understood. Some people (foundries) will give you a formula
for 1/f where the noise goes down only as 1/L, and not as 1/sqrt(W.L). Also note that the happy situation of reduced 1/f noise
(gate-referred) as more and more traps contribute is not seen in the time domain. You can average for all you want without
reducing 1/f noise.

Regards
Vivek
Back to top
 
 
View Profile   IP Logged
Hunter_BJUT
New Member
*
Offline



Posts: 4
Beijing
Re: MOS flicker noise inversely proportional to WL
Reply #2 - Dec 6th, 2006, 5:35pm
 
vivkr wrote on Dec 4th, 2006, 6:08am:
2. As the gate area increases, more and more traps are active in contributing 1/f noise. Thus, the 1/f noise as an ensemble
average is reduced compared to the noise of a single trap.  Thus, for most cases excepting extremely tiny gate areas, the
noise contribution will smoothly go down as gate area is reduced. For the limiting case of a very small gate area, if there
is no trap, there will be absolutely no noise due to trapping, and if there is a single trap, then its noise will be higher than what
you may expect from the standard formula.

Hi, Vivek
  Thank you for your elaborate reply. I have a confusion in your second paragraph. I think you meant the esemble average of 1/f noise is lower than single case because some tiny place might not exist trap, then the average decreases. However, as you said more traps are active with the increase of W*L, why not the tiny place takes on more traps ( the frequency of capture-release of one trap may be increase dramatically ) than a single? If that was true, 1/f noise would increase with W*L.
 Another question is that what is your opinion and measures in circuit design to reduce 1/f noise if we are not clear enough to know about 1/f noise?
Looking forward to your reply
 Best Regards,
                                                                                                F117
Back to top
 
 
View Profile WWW Hunter_BJUT   IP Logged
vivkr
Community Fellow
*****
Offline



Posts: 780

Re: MOS flicker noise inversely proportional to WL
Reply #3 - Dec 7th, 2006, 6:40am
 
Hi F117,

I am not sure if I understand your statement correctly, but here is an attempt to answer it:

1. Each trap operates independent of all the others. Hence, the overall effect is ensemble averaged. For instance, not
all traps may be trapping and releasing the charges at the same time. The trap density is typically constant for a given
process and so for moderate-large gate areas, increasing the overall gate area gradually increases number of traps. As
the trap action can be considered as charge fluctuations in the channel, these can be referred back to the gate.
In summary:

in^2 = K. (WL), where K is some constant
vn^2 (at gate) = in^2/Cgate^2 => vn^2 = K/(W.L)

This is the principal reason why you have smaller 1/f voltage noise when the gate area is increased.

2. For very small gate area, there may be no trap. However, if there is a single trap for a very small gate, it causes
more noise. For example, if the trap density is 2 traps/10 (um)^2, then the average number of traps for a 1 (um)^2 gate
would be 0.2 . However, for any specific gate, you will either have a trap or not have a trap (assuming no more than 1 trap
for a small gate). Thus, the noise from having a trap is higher than the average prediction. Note that the numbers quoted here
are not realistic.

3. To remove 1/f noise, you need to use some form of autozeroing such as correlated double sampling or chopper stabilization,
both of which will result in circuit overhead and more thermal noise.

You can find more information by searching for these topics in the previous posts.

Regards
Vivek
Back to top
 
 
View Profile   IP Logged
Hunter_BJUT
New Member
*
Offline



Posts: 4
Beijing
Re: MOS flicker noise inversely proportional to WL
Reply #4 - Dec 10th, 2006, 2:56am
 
Thank you for your time and considerations.

Best Regards,
                                                     F117
Back to top
 
 
View Profile WWW Hunter_BJUT   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.