FuhmW,
You will find that there are no universal strategies for protecting HV pins, particularly on a process that is not mainstream CMOS or BiCMOS. There are several options however, and you may need to review a lot of information and theories before you can arrive to a strategy that will meet the needs of your design as well as function in your process.
I would recommend three books to start with:
The general reference thru much of the industry by Duvurry and Amersekera is a great starting point for some one new to ESD design with some good fundamentals and device physics.
http://www.amazon.com/Silicon-Integrated-Circuits-Ajith-Amerasekera/dp/047149871... The next book is newer, by Voldman, but is very detailed in device physics and ESD physics, I would consider this one optional for an individual not dedicated to a lot of ESD design.
http://www.amazon.com/ESD-Circuits-Steven-Howard-Voldman/dp/0470847549/sr=1-3/qi...Finally, what is probably to most friendly reading to someone new to ESD, this book by Maloney and Dabral is a great introduction to ESD with a well written focus on circuit design techniques and topologies (including HV), but without much of the rich device physics found in the previous two. This is generally a number 1 recommendation to IO designers integrating ESD into their designs.
http://www.amazon.com/Basic-ESD-I-O-Design/dp/0471253596/sr=1-2/qid=1165846710/r... Again however, you may not find exactly what you are looking for in any of these books, as most focus on standard CMOS technologies. (Voldman covers a fair amount of SiGe but that is due to his RF work at IBM).
I hope this helps you find the information you are looking for.
-SRF Tech