Hi Everyone,
I am trying to model a generic Flyback DC-DC converter for its Transient response for High slew rate load the kind you encounter with Processor core VRM like applications. I was told that using a Sampled data Pspice model would be a better idea than using the state space averaged model. I was even made to believe that there is a seminal work by Arthur Brown of Caltech that talks in lenght about the this discrete time samped data model. The same person who gave me this fruit of an advice extolled the usefulness of the sampled data model in capturing the Fs/2 gain peaking  that is associated with Current mode control.

Having said all this, Would anyone be aware of this technique and how it can be leveraged to create useful Pspice models that can later be modified for other topologies such as Buck adn Buck-Boost.