Hi all,
        I am new to analog design as was wondering how do experienced analog designers design their circuits. For e.g take a 2 stage opamp...

1. In school they gave us the process parameters(un,cox,vth,..) for .35um process. But if you are designing for 90nm technology how to find these values.One way I know is to put the transistor in triode region and plot Id vs Vgs.I get the slope from that graph and by this eqn  Slope = k * W/L* Vds I can find the value of k. Is this method correct?

2. How to design if one does not know un,Cox values?

3. Is there any generalized method to design a 2 stage opamp?

Thanks
BR
Vabzter

Also, take a look at Berkeley's course
http://bwrc.eecs.berkeley.edu/classes/ee140/

You've also got webcast lectures where there's a nice discussion of a real-world project- a 2-stage op amp design.
It goes through all practical stuff including simulator pitfalls, hand calculations and design trade-offs

Good Luck!

Gau

Vabzter wrote on Feb 8^th, 2007, 7:23am:



I don't worry about those things...  You can do a lot by simply knowing that gm=2*I/Vod, where Vod=(Vgs-Vt).   You don't need to know what K' or Vt is to tune Vgs-Vt.... if it is too big, make the devices wider or lengths shorter.  You can get Vgs-Vt from the DC operating point information.  Vdsat is close to the same quantity -- it is what I usually look at.  Hand calculations that use more than Gm have limited use in the design process.... everything interesting is determined by parasitics or nonideal effects (plus Vt and K' change depending on operating point, sizes, etc).

Opamp design is pretty simple (ok, that is a gross exageration)....  You give the diff pair high gm, and the load (current mirror) low gm.  If you don't, you get a bad op-amp.  End of story .

For a given current, all you can do is change Vod.  150mV is a reasonable target for Vod for the diff pair.  Lower than that, the diff pair gets into weak inversion and wider widths offer only small improvements (i.e. diminishing returns).  2-400mV is a good target for the mirrors.  Since Vod =~ Vdsat, the upper limit is usually set by the amount of headroom you have.  

From that basic starting point you can play with the sizes to suit your particular situation (keeping current fixed and lengths as small as you can).  If your diff pair is causing frequency response problems you need to make it smaller, which will likely decrease gm (because Vod is increased).  Similarly, making the mirrors smaller (increasing Vod) will increase their frequency response (lower Cgs), but it may make other problems - like headroom or an inability to drive cap loads.  If you cannot fix things by changing Vod, your only other choice is to increase current (or change topologies).  

That said, the first thing I do when I get a new process is to plot the Vt vs. Width for various lengths of devices.  You get the Vt information from the DC operating point (just diode connect the devices and put 1uA thru them and do a parametric anlysis sweeping width and length).  You will find that Vt is a strong function of length and width for smaller geometries.  It is also instructive to plot gm/I vs Vgs-Vt for various sized devices, as well as Vt vs bulk-source voltage.  Armed with a few of these plots you can get most of the information you need.  Note that, in some sense, this is determining K' and other parameters, but since they are functinos of device sizes it put them in a more usable format.

rg

RobG wrote on Feb 8^th, 2007, 10:29am:


Hi RobG
             Thanks for the comprehensive guide to design. It certainly cleared most of my doubts. One more question..I want to drive a 35pF load at the output of opamp. The current consumption should be less and in range of 50uA. Which config should I use..will a simple 2 stage amplifier work or should I go for Folded Casode one? The supply is 1.8V.
Thanks a lot for your help
BR
Vabzter

The folded-cascode amplifier is useful for increasing the ICMR.

mg777 wrote on Feb 9^th, 2007, 5:47am:


You are probably referring to the tutorial by Grey and Meyer in the Dec. 1982 issue of JSSC.  Every month this article seems to still make the top 100 IEEE most downloaded article list even after 25 years.  It is definately a must read: Click Here for article.

Rog

Hi Vabzter

The simplest and quickest way of obtaining k' is to look at your model files. If you are using spectre, you can locate your model files using the menu in the simulator's window: Setup -> Model files

k' = uCox. "u" is already given in the model file as "u0". Cox can be calculated using:

Cox = (er)(e0)/tox

er = relative permittivity of SiO2 = approx 3.9
e0 = 8.854x10e-12
tox = give in model file as "tox"

An opamp design always starts with the selection of the topology. Everything follows after that. Your specs seems quite tough: 10MHz bandwidth, drives a 35pF load, large output swing but yet the current consumption has to be about 50uA. Is it possible? : ) Seems quite a challenge to me. The book "Design of low voltage, low power operational amplifier cells" by Ron Hogervorst and Johan H Huijsing(Publisher: Kluwer Academic) might be useful for you.

Hope that this is useful for you.

Best regards
Quek

MTXamp wrote on Feb 17^th, 2007, 8:53pm:


Hi Quek,
            Yes I had tried before with the model files but the results were not matching the simulation plots..
For the opamp I guess I have to decrease the bandwidth as I am going to use it to drive a 35pF load. The critical parameter is current consumption..
Thanks a lot for your help,
BR
Vabzter