Hi, Guys,

Would you please introduce a switching sequence that is suitable for 10 bit CMOS DAC? I need good dynamic performance. The DAC should be intrinsic accurate. I mean it has not any calibration or trim.

I read some papers that describe symmetrical switching, hierarchical symmetrical switching, hierarchical symmetrical switching with the current source matrix divided into 4 quadrants, Q2 random walk. Obviously, the last method need very complex decoding logic. So I think it is over-designed for a 10 bit CMOS DAC.

Any comments are appreciated.

Yawei