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kim57

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start-up time for bandgap reference
Apr 08^th, 2007, 8:32pm

i was design a bandgap reference, when i tried to simulate the star-up time..
i found that if i put the rise time of the Vdd to be 1ns..the circuit will not work and the output will oscilate..
if i change the time to 1ms.. the circuit started smoothly..

why the circuit cant start-up wil short rising time?? and it's stated that the MOSFET i used were in the breakdown region? anyone can help?
how to make the circuit work for 1ns rising time?

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ywguo Community Fellow Offline Posts: 943 Shanghai, PRC	Re: start-up time for bandgap reference Reply #1 - Apr 8^th, 2007, 9:04pm Hi, Do you have a start-up circuitry in the bandgap? What is the frequency at which the output oscillates? What tool do you use for simulation? Thanks Yawei
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sheldon

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Re: start-up time for bandgap reference
Reply #2 - Apr 8^th, 2007, 9:16pm

Kim57,

Could you provide any additional information about your circuit?
For example,

1) What does not work mean? is the circuit turned off, Ibias=0
does the block latch-up, Ibias=1A?

2) Does the band-gap reference include a start-up circuit?

3) Does the simulation include package parasitics?

4) Does the simulation include layout parasitics?

5) Are the transistors breaking down because the simulation is failing to converge?

6) Are you using core transistors, for example 1.2V transistors, in an I/O
voltage application, 2.5V? So that if the circuit is not correctly biased the
devices are in breakdown?

BTW, why do you need a 1ns start-up time for the band-gap reference?
It seems a little fast.

These are just some suggestions to think about. However, in general the better
you can describe the issue, the easier it will be for respond to you request with
useful information.

Best Regards,

Sheldon

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kim57

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Re: start-up time for bandgap reference
Reply #3 - Apr 8^th, 2007, 10:15pm

Thanks for reply..

The circuit is with the start-up circuit.. i was using the Vituaso Analog Design Environment to run the simulation...

The circuit worked for the DC operation.. but i wont work for the transient operation or analysis..

The transistors breaking down because the simulation is failing to converge.. due to the current of the PMOS falling to extreme -ve value

I was using the 3.3V transistors for the design...

1ns seem to be too fast? so usually how long should be the rising time?

thanks

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chase.ng

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penang/malaysia

Re: start-up time for bandgap reference
Reply #4 - Apr 9^th, 2007, 5:50pm

Hi Kim57,

Does you simulation uses any ideal devices? like VCVS? veriloga models?

Some bandgap need to be properly compensated for it to be working, you might need to check the stability of the circuit.

1ns is really fast, most practical circuits will have large capacitance on the power supply due to the bypass and decoupling caps. I will be surprised if it can rise in such a short time.

Regards,
chase

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Chase

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loose-electron Senior Fellow Offline Best Design Tool = Capable Designers Posts: 1638 San Diego California	Re: start-up time for bandgap reference Reply #5 - Jun 5^th, 2007, 12:20pm No power supply rises in 1ns. That said, a schematic of your circuit and description of your test setup is a good starting point.
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mg777 Senior Member Offline Posts: 131	Re: start-up time for bandgap reference Reply #6 - Jun 6^th, 2007, 8:03am In general I suggest that posters use a circuit from a textbook or journal paper to showcase their question. We derive two major benefits by doing so: (i) simplify the problem, (ii) access the same reference in the public domain. M.G.Rajan
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