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FastSpice or AHDL? (Read 201 times)
Visjnoe
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FastSpice or AHDL?
Apr 16th, 2007, 8:29am
 
Dear all,

in most of the papers on this website, Ken promotes a behavioral modeling approach towards full-chip verification, using models that (very closely) match the implemented, transistor-level behavior of the individual modules and hook these up to simulate the entire system in a time-efficient manner.

Now, I'm certainly in favor of such an approach, but lately I have been wondering if most people (analog designers) will not choose the path of the FastSpice simulators?

Recently, I have been trying out one of these simulators (HSIM in particular) and it can simulate complex circuits very quickly at the transistor level. For the typical simulations you want to run at this level, the accuracy is also very good (I would say within 5% of SPICE accuracy). I even read blogs of people who simulated entire chips with it in a timely manner.

Now, given the 'natural resistance' of most analog designers I know to learning a programming language, I would think this is the path most people will pursue in the future to do full-chip verification, instead of behavioral modeling...any opinions on this?

Regards

Peter
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Andrew Beckett
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Re: FastSpice or AHDL?
Reply #1 - Apr 16th, 2007, 10:36pm
 
I think both approaches have their uses. I personally tend to like the modeling approach, as I think it gives you more flexibility. Also, fast spice engines can start to run out of steam as designs get bigger, and so you end up needing to model anyway.

Plus the fact that if you're doing top-down design, you'll have the models anyway (at least to some level; you may need to "calibrate" them to add real-world behaviour).

With large mixed-signal verification simulations, I see benefit in using a combination of Verilog-AMS (or whatever your favourite language is) with fastspice, so you can simulate large numbers of transistors with some blocks as behavioural models.

So I see room in the universe for both; they are complementary ways of verifying your system. However, in order to do top down design (which is A Good Thing To Do TM), you'll need to learn a modeling language anyway - you can't use fastspice for that.

Andrew.
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Re: FastSpice or AHDL?
Reply #2 - Apr 17th, 2007, 7:48am
 
Peter,

  I think that you are missing the point. When you want to explore
possibilities, do design at a high level, then behavioral modeling is
useful. You can't use a FastSPICE engine until you have a schematic
(or at least a netlist), that is, until after the circuit design is done. So
a designer using AHDL can finish their design and verify connectivity
before ever creating a single circuit schematic[netlist]. Using FastSPICE,
you need to create all the blocks, connect them up, and start debugging.
Yes, simulation time is fast, but the time to tape-out is not necassarily
reduced.

                                                                Best Regards,

                                                                  Sheldon
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Andrew Beckett
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Re: FastSpice or AHDL?
Reply #3 - Apr 17th, 2007, 9:33am
 
Sheldon put what I was trying to say far more succinctly. Thanks!

Andrew.
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Visjnoe
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Re: FastSpice or AHDL?
Reply #4 - Apr 18th, 2007, 1:01am
 
Sheldon,

I think you misunderstood my statement.

I justed wanted to point out that I believe a lot of analog designers might take the FastSpice path, so they can keep designing like they always did (bottom-up): start at the module level and verify the system using FastSpice. This bottom-up style of design is still very wide spread, even in big and known companies (maybe especially in big and known companies Smiley)

I know that in this manner, one cannot do a decent high-level design (like promoted many times in this forum), I was just wondering if in daily practice most designers/design managers would not choose to go this way instead of going for the 'modeling learning curve'?

Once again, I know that in this fashion, they would still be designing in a bottom-up fashion, so it's more a philosphical question about human nature (the tendency to resist change)...

I think Ken has a good view on this whole situation through his work as a consultant on these issues.

Regards

Peter

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Eugene
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Re: FastSpice or AHDL?
Reply #5 - Apr 18th, 2007, 5:20pm
 
I think the idea of a top down design flow is good but I have yet to experience it in practice because schedule constraints seem to always force the designers to work in parallel with the modeling engineers. By the time I'm ready to model a particular block, many times the designer has gotten ahead of me and I must do the usual bottom up modeling flow.

One big problem with system verification is that the system is never frozen until tapeout. Thus, regardless of what flow we use, the models must be constantly updated. Many designers expect the modelling team simply to track his or her changes and that invites problems since designers usually outnumber the modelers. This is where I like to bring top-down ideas into play. Specifically, after a model has been tested in the larger system, I try to get the designers to treat the model and its testbench as an executatble specification. That means they become responsible for swapping their ckt in for my behavioral model in the appropriate testbench(es) and for initiating negotiations should the circuit fail to behave like the model. If the changes are acceptable, we change the model and testbench. If not, the proposed circuit changes are rejected.

-Eugene
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mg777
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Re: FastSpice or AHDL?
Reply #6 - Apr 26th, 2007, 6:00am
 

Top-down is often the choice of those driving the product concept while bottom-up tends to be favored by those who have to make it work. This tension is a necessary condition to make great products Smiley

M.G.Rajan

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Eugene
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Re: FastSpice or AHDL?
Reply #7 - Apr 26th, 2007, 8:13am
 
Well said.
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loose-electron
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Re: FastSpice or AHDL?
Reply #8 - Jun 5th, 2007, 12:27pm
 
In an ideal world... Wink

Wait, we are all engineers here... Shocked

Well in reality, it always is a mix of both. Here - read this:

http://www.edn.com/article/CA6426885.html

Ken actually contributed his thought to this and I pumped it thru the EDN pipeline a few months back.

Jerry
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Jerry Twomey
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Re: FastSpice or AHDL?
Reply #9 - Apr 10th, 2008, 2:31am
 
Why most analog designers work bottom up with top down in mind?

It is the only way it works. If designers start bottom up they still have the topdown model in mind. And sometimes much better they leave the topdown model more vague in there minds if the bottom outcome could impact the topdown model more serious.

The hierarchical workflow creates the need for design contracts in an executable way. The model improve sometimes the understanding of the bottom design, or to be more specific, creates a more abstract view of the bottom up designed circuit. So there is a clear explanation why designers are so resistible to topdown methods. They are not needed for there own work responsibility. The models are needed for the hierarchical workflow. And the bad stuff about that is that analog creativity and perfection is rare and writing numerical accurate models exceeds often the capabilities of otherwise good designers.

Why do not others, I like to say model consumers, within the workflow, write the models. I imagine models which are ready after engineering samples. Smiley

Take an example: A complex analog baseband filter before the ADC in a receive path. With 4 programmable bandwidth settings and a calibration unit. If this filter model should give frequency depend noise response, EVM contribution, alternate channel blocking performance, matching depend supply rejection, ... it could be an endless list, model creation and verification effort higher than the circuit design effort.

Or lets say in much more cynical way. The schematic is the model!

If the model of the filter is only the s-function, what is the purpose of the model? The model consumers want all relevant effects which make an impact on interconnecting models or the performance contribution. But things which pop up in interconnecting circuit does not pop up by interconnecting models if the source of this verification surprise is not foreseen in the model! That is the reason why Spice is also needed for higher, in most cases toplevel verification too.

So the general answer is model consumers should write models as executable specification, circuit designers write there own model, the schematic. Hierarchical model verification is limited to things which are known in advance, verification is to cover also the unknown. Writing models could be a good learning exercise for model consumers honoring the effort of writing simpler models, the schematic.

Finally both is needed! More Spice and more models. The first to verify on the models closest to the physics, second to specify and communicate on the next level and only partly verify model interconnection on base of effects which you already know about.
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Re: FastSpice or AHDL?
Reply #10 - Apr 13th, 2008, 11:24pm
 
The big problem I have is that people think these are COMPETING approaches..
By the time the system gets big (even a "simple" WiFi transceiver + PHY)
a considerable amount of effort will go into both behavioral models of the circuit AND for the TESTbench.

if the FastSpice simulator cannot ALSO handle VHDL, Verilog, Verilog-AMS and Verilog-A, its utility will be quite limited,
as it will take longer to re-write my testbench, than to let a slower simulator run longer.

VCD file import capability is fine where there is little interaction between the digital and the analog.. but all it takes is one PLL in the analog to
throw all those bets off..

I'll be glad to use ANY speedup I can get in the simulator... just don't try to take away the behavioral modeling capability.
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jbdavid
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vivkr
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Re: FastSpice or AHDL?
Reply #11 - Apr 14th, 2008, 2:34am
 
I prefer the top-down approach. However, bottom-up design concepts when implicitly invoked while doing the top-level design
can allow the designer to simplify the specs for bottom-level designs (final blocks) in such a manner that a top-down approach
really works, and does not need much tweaking in a bottom-up fashion anymore.

Naturally, whether a designer is better able to apply the top-down or bottom-up approach as the main approach depends on the
complexity of the design (C) and the experience of the designer (E). As C goes up, top-down becomes more attractive. Don't foget E.
Without it, you won't get far either way.

Cheers
Vivek
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loose-electron
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Re: FastSpice or AHDL?
Reply #12 - Apr 15th, 2008, 12:50pm
 
mg777 wrote on Apr 26th, 2007, 6:00am:
Top-down is often the choice of those driving the product concept while bottom-up tends to be favored by those who have to make it work. This tension is a necessary condition to make great products Smiley


Hopefully not too much tension in the process however. Lets call it a frinedly discussion, shall we?

That said here's a direct link on this one:
http://www.effectiveelectrons.com/whitepapers/Efficient%20Simulation%20and%20Val...

PDF is there so you dont have to go thru the advertising up front on the EDN site. All the methods have merit, and it largely depends on what the design is.
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Jerry Twomey
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Contract IC-PCB-System Design - Analog, Mixed Signal, RF & Medical
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