Can anyone here tell what is the size consideration in design MOS current mirror? should I must use equal length? why? what 's the principle when i am choosing the width of the transistor? Could anyone shed some light on this ???

TIA.

Julian

Julian,

 It is difficult to answer the question without context,
that is, what is the intent of your question? Are you
looking for guidelines for best matching? Do you need
to increase the output compliance? Do you need to
minimize the saturation voltage?

In general, it seems like the rules would be something
like,
1) Match length
2) Match finger width
3) For high impedance, increasing gate length can help
4) However, it is better to use a more complex mirror
   design to increase impedance, for example, cascode
   or gain boost

                                                Best Regards,

                                                   Sheldon