The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Sep 30th, 2024, 6:29pm
Pages: 1
Send Topic Print
Resistor Layouts & IBM process (Read 2478 times)
eng
Community Member
***
Offline



Posts: 49
USA
Resistor Layouts & IBM process
Apr 26th, 2007, 4:24pm
 
Hi all,

I'm using IBM .18um process. I need to use some resistors in my design. The first one is compensation resistor that will not draw any DC current, the other one will draw 30 uA. These resistor have big values 30k, 100k. IBM process has a p- polysilicon resistor which gives the biggest resistance per area. It comes W=3u and L=3u by default.
The questions
- In order to minimize the area how far can I reduce W of resistor. (minimum is 1.1u)? It should be dependent on the current flow. Is 30u current big enough to worry about the W of resistor? Is there any equation min W in terms of max current?
- The resistor has two option nwrrpres and nwrrpresx  (x means explicit body connection?). Are they different in terms of layout?

P.S. This post should fit in a layout/process forum but I couldn't find any. sorry...
Back to top
 
 
View Profile   IP Logged
ACWWong
Community Fellow
*****
Offline



Posts: 539
Oxford, UK
Re: Resistor Layouts & IBM process
Reply #1 - Apr 27th, 2007, 2:38am
 
IBM have an excellent model guides and design manual which explain things very clearly.  These can be found in the process doucmentation as part of the kit.
Anyway
1) A minmum W will exist, as will a maximum DC current density.... 30uA is a small current so you will have no problem with using minimum width. Whilst minimum width will reduce area and parasitic, it will invitably increase variablity.
2) The x allows explicit connection of the bulk connection. Without the x, the component uses netset property to connect the bulk (which i seem to recall is default to sub!). again the kit documentaion should cover this. Layout is the same, although incorrect schematic connect of the x terminal may lead to layout difficulties.
Also nwrrpres sounds like an nwell resistor not a p- poly resistor which should be called oprrpres.

cheers
aw
Back to top
 
 
View Profile   IP Logged
skas20
New Member
*
Offline



Posts: 9

Re: Resistor Layouts & IBM process
Reply #2 - Apr 27th, 2007, 3:21am
 
IBM process design manual will give you what is the minimum width you can use for the resistor.
However, It is not good to use minimum because the variations on the model parameter will be +-10% or more.
hence you can use may be a 0.5 micron extra than minimum which also brings down the tolerance.

For the maximum side, the process design manuall will give the voltage and current capacity of every device can afford to be operating in normal characteristics.

Appart from oppcres and nwrrpcress, you can also use opndress (diffusion resistor) which has more density compared to poly resistor.

but remember, polyresistor gives you the least tolerance.

Regards,
SK.
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.