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EE Times commentary: analog layout automation (Read 8682 times)
mg777
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EE Times commentary: analog layout automation
May 20th, 2007, 7:28pm
 

EDA veteran Jim Solomon on analog layout automation:

http://www.eetimes.com/news/design/showArticle.jhtml?articleID=199601718

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didac
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Re: EE Times commentary: analog layout automation
Reply #1 - May 20th, 2007, 11:54pm
 
Good article, it explains  very clear which are the main problems of analog layout and how must be the solution. The only sad thing for me is that  I must hurry to get the Phd or at the lab I will be obsolete as "layout man"...
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krishnap
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Re: EE Times commentary: analog layout automation
Reply #2 - May 23rd, 2007, 7:25am
 
Articel gives good insight on the needs for analog layout automation.
Currently few options like autorouter , where precesion is not important
and  pcells for bigger modules etc are giving some speed.
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weber8722
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Re: EE Times commentary: analog layout automation
Reply #3 - Oct 29th, 2012, 7:16am
 
Hi, reading this article from 5/17/2007 now - 2012 - I think not much has changed at all!!! Sad
For most non-trivial circuits, like having 40 transistors most autoplacer fail, although a good designer can find a solution quickly. The constraint concept ends up with adding more and more constraints, till you have no overview anymore or run into over-constraintment or tool problems!
Take a look at "Deterministic Analog Circuit Placement using Hierarchically Bounded Enumeration and Enhanced Shape Functions", 2010. This paper describes an advanced placer, but the created layout would NEVER survice a real-world design review  :'(.
It seems that our PhD workers like to create new and more algorithms, but not even have criteria or benchmark to decide what a good layout is!

Bye Stephan
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Dan Clement
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Re: EE Times commentary: analog layout automation
Reply #4 - Oct 31st, 2012, 8:09pm
 
Check with the analog rails guys...
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