jeremy_zhu wrote on Jun 19th, 2007, 4:37am: i'm trying to design a ultra-low voltage opa . the model i used to design it is a typical 0.5um CMOS model whose Vtn≈0.85(w/l 20/0.5) ,Vtp≈0.95(w/l 20/5.5), but my supply voltage is only sub-1v(0.9 or less). the opa must satisfy the specifications:>80dB 10~20Mhz GBW and constant gm with rail to rail ICMR. i want to know whether it can be realized for the model by some special technique :FG ,BULK-DRIVEN or some other ones.
any special comments ,suggestions or useful references?
Hi Jeremy,
While bulk-driven techniques may be not be optimal for your specs, you can certainly try to reduce the threshold voltages of your transistors by applying a
small forward-bias to the bulk-source junction. Needless to say, this is fraught with peril in case you latchup.
Regards
Vivek