calven
Junior Member
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Posts: 18
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hi! i am a freshman in pll design.i have designed a pll in transistor level.the simulation tool is spectre.the voltage domain model corresponding to the first waveform is implemented with veriloga presented as a comparision,and the simulation time is 30u.the circuit corresponding to the second waveform is implemented with transistors,and the simulation time is 3u.according to the waveform,we can see that the waveform settles to a ripple(and the curve is not a line,but at some instant the curve has different values).it is more obvious in the third figure,which is a part of the second figure zoomed out.what cause this? additionally,the ripple will last for a long time.i have simulated the circuit with the simulation time of 50u.the amplitude of the ripple maybe decreases,but not apparently.however,the ripple of the veriloga model decrease quickly.the veriloga model and the transistor circuit basiclly have the same parameters,and what is the reason? give me some explanation and advice,please.thanks a lot.i am sorry that i can not upload the image bigger best regards
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