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CT delta sigma question (JSSC Dec. '06 paper) (Read 1314 times)
vivkr
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CT delta sigma question (JSSC Dec. '06 paper)
Jul 11th, 2007, 6:48am
 
Hi all,

I was looking at the paper by Mitteregger et al. in the Dec. '06 issue of JSSC.

I have a question here, which might be easy for CT delta-sigma designers to answer. On page 2644,
and right in the first paragraph, the authors mention one of the merits of their loop filter architecture, stating
that

"Another advantage
of this loop filter topology is that the bandwidth of the
first integrator can be large, as there is no feedback to the following
stage and the output signal swing of this integrator can
be scaled only with its bandwidth."

What do they mean by this? Could someone enlighten me please?

Thanks
Vivek
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