Of course there are reliability issues: you're using the device outside it normal operating conditions. The process design guidelines should be able to tell you what the maximal Vds is at which most devices will break down.

Consider also that you are putting a field of 5V/0.3um = 1.67e+07 V/m across the channel. You might expect some HCI issues, I would say. I presume this is the minimum length for a 3v3 compliant PMOS device?

What could be worse is that the model parameters are not valid in this operating region - that really depends on the characterization procedures for the given device. Again, the documentation of the process should be able to give you the details.