Visjnoe
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Dear Hanm,
I think you pose a good question with regard to the PSRR specification. In most projects I've done, PSRR (for all building blocks, not just the regulators) is specified 'ad hoc' by the customer (or so it seems).
I've always insisted on treating this specification using a more structured approach. When it comes to PSRR, there are basically 2 important variables: 1. the frequencies of interest: you can never be entirely sure which frequency will eventually bug you the most, but having a look at digital clock frequencies/switching frequencies etc. (and their harmonics!) that are actually present on your chip is probably the most sensible thing to do. Also have a look at the switching frequencies of external regulators (if any).
2. when it comes to the actual PSRR specification at a certain frequency, I would suggest you try to analyze (by hand) the effect of ripple on the supply on the performance of your block. This provides the most insight. If handcalculations are too tedious, make PSRR a part of the behavioral model of your building blocks. Set PSRR specifications of your building blocks and examine relevant system metrics (e.g. EVM for a WLAN receiver). Adjust the PSRR specifications until the system impact is as low as you want.
Regards
Peter
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