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asb1211

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Problem when simulate S-para for K factor
Sep 06^th, 2007, 7:40pm

Hi everyone,
I am designing a logarithmic amplifier. The selected topology as in the photo attached below.
The circuit include some amplifier cells, rectifiers and input/output buffer
Input buffer and Amplifier cells are RF circuit obviously.
Rectifiers are half RF (input) and half DC (output)
Output is DC circuit.
The question is when I simulate S-parameter for K-factor value, should I put the output terminal at the last amplifier cell output (point A) or at the final output (point B) or what? and what should be the terminal resistance if the answer is "at last amp cell output"? 50 Ohm or a very large value?

Thanks for help in advance.

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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: Problem when simulate S-para for K factor Reply #1 - Sep 11^th, 2007, 3:15am Hi. Generally a stability of log envelope amplifier is dominated by cascaded limitter amplifier stage. So first you should measure S-parameter with A as output. If you do small signal s-parameter simulation, you can set any value as port impedace.
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pancho_hideboo

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Re: Problem when simulate S-para for K factor
Reply #2 - Sep 12^th, 2007, 8:28am

I have correction about termination at A.

If there is some parasitic feedback in limitter amplifier stage,
stability could be affected by termination conditions at A.

So you should set high port resistance with parallel capacitor which are expected from layout results.

But I don't recommend using S-parameter method(K-factor) for evaluating stability,
instead I recommend using stab analysis of Cadence Spectre or Middle Brook's Method.

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« Last Edit: Sep 13^th, 2007, 2:52am by pancho_hideboo »

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http://www.youtube.com/watch?v=mjIxGh55bMM&feature=related

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asb1211

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Re: Problem when simulate S-para for K factor
Reply #3 - Sep 14^th, 2007, 8:02pm

pancho_hideboo wrote on Sep 12^th, 2007, 8:28am:

I have correction about termination at A.

If there is some parasitic feedback in limitter amplifier stage,
stability could be affected by termination conditions at A.

So you should set high port resistance with parallel capacitor which are expected from layout results.

But I don't recommend using S-parameter method(K-factor) for evaluating stability,
instead I recommend using stab analysis of Cadence Spectre or Middle Brook's Method.

Thanks alot :) for your comments.
I did tried the high-resistance port.
Could you explain why shouldn't I use the S-parameter method? In my case, I am designing with ADS, what are equivalent with stab analysis or Middle Brook's method?

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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: Problem when simulate S-para for K factor Reply #4 - Sep 16^th, 2007, 1:43am http://www.designers-guide.org/Forum/YaBB.pl?num=1049348496 Insert Sprobe(short probe) into any path. About Sprobe, see ADS's manual.
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