hi, guys,
   here i wanna design a TTL output interface circuit, the requirement is shown as following:

1. low logic level <500mV, high logic level = Vcc (offered by the external supply, independent on the chip supply)
2. the load is consisted of a 7.5Kohm pull up resistor parallel with a 20p capacitor.
3. the singal frequency is as higher as 100MHz.

  i have been tried many prototypes, such as open drain、push pull、cherry hooper amplifier, however, non of them can reach the requirements.  do you guys have any other structures or techniques、solutions, please post it, i really need your kindly help, thanks in advance.

best regards
Nio Lin

hi, Yawei,
 thanks for your reply, the output high logic level is not exactly required to equal to VCC(external), but we still expect it is not less than Vcc-0.3V.

Best Regards
Nio Lin

Hi Nio,

So Vcc-0.3V is your requirement for the minimum high output voltage.  Don't you meet this spec, assume you have pull-up resistor?


Yawei