I can not think of any one particular I would recommend at the moment, but I will offer basic advice that I have come to understand thru both my own research projects and experiences as well as those of others I have known and worked with.

Guard Rings generally serve two purposes:

1. Noise Isolation
2. Latchup and ESD Protection

A few basic comments regarding both:

I. Noise Isolation:
   
    1.  If the guardring does not have a low resistance/impedance/inductance strap to the primary power busses, it will not be effective.
         The effectiveness of the guardring to shunt noise is determined by its impedance as seen by the noise, poor or highly resistive/impedance connections effectively isolate the guardring from the quiet supplies.  Use lots of contacts, vias and metal getting the guardring connections to the power/GND supplies to which you want to shunt noise.          
(In other words do NOT route a nice fully contacted guardring and then on the very far corner have a 2-4 via jumper to a minimum width metal line that runs 100's of ums to a power supply...you basically rendered the ring useless).

    2.  Double guardrings are more effective than single, triple are not much more effective than double and quadruple guardrings basically serve the unique purpose of wasting silicon space.  Use double guardrings but do not waste much more area beyond that.

    3.  Distance is Key!!  The closer your guardring is to the circuit you are protecting the better it will work!  (Thus the ineffectiveness of quadruple guardrings who are generally further away).  The rings should be laid out at nearly minimum distances from the sensitive nodes assuming you are not running into capacitance issues.  Also they should conform to the shape of the sensitive circuit, not just be a big square, in order to maximize effectiveness.

    4.  Offense is better than defense!   What do I mean by this?  It means that you will do a much better job of picking up substrate noise by guardringing your aggressors than you will by guardringing your victims.  Its not to say that it does not help, but studies I have been privy to have shown that there is substantial benefit by focusing on the noise generators while placing guardrings.  Granted this can be hard to accomplish when the main aggressor is a large digital block.  Of course your always better off if you guardring both aggressors and victims.


II.  Latchup and ESD

   1.  Similar to Noise isolation, resistance/impedance is key so make sure the rings are definitely strapped into the power/GND busses, not some anemic 2 via minimum width metal route.

   2.  Double guardrings are very effective and anything else is generally unnecessary.

   3.  Generally, only nodes directly connected to the Pad/Bump or capacitively coupled (input gates or AC coupling cap or even parasitic cap) to the pad/bump should really be concerned about latchup.  There are always exceptions for certain internal nodes but this tends to be the general rule.

   4.  Only included devices connected to the latchup risk nodes in a guardring!!  (i.e if you have a double guardring wrapped around an output driver, make sure there are no control logic or enable logic devices included inside the primary ring...this can be very risky!

   5.  Never place two N+ rings next to each other without a low resistance P+ ring in between!  Especially if the N+ rings are at different potentials, otherwise you are just begging for a parasitic NPN latchup event. I can't tell you how many times I have found this to be a problem in a clients product!

   6.  Pay extra attention to PMOS and NMOS spacings when doing your guardringing  of output devices.  Never EVER guardring them together even if they are part of the same driver!  If you guardring your PMOS and NMOS devices together you have just taken an extra step towards ensuring a latchup event.  (This is basic

I will stop with these, I am sure other have very insightful comments as well.

Stephen
SRF Technologies

   

Hi Stephen,

can you please elaborate on ESD and Latch-up point 4?
Quote:


It's not so clear to me.

Thanks

Thank you Stephen, I think I got the point.

Regards

Hi Stephen,

Quote:


When I have enough pins, the guardring is connected to a pair of special power/GND supplies which is quiet and for guardring only. However, I am always pondering whether the guardring is connected to analog power/GND or digital power/GND when I have not any power/GND for guardring only. I often guardring analog part because the digital block is huge. So the substrate noise pollute the power/GND if the guarding is connected to analog power/GND. But the sensitive analog circuitry is interfered if the guardring is connected to dirty digital power/GND and very near, isn't it?

Best regards,
Yawei

wyyll wrote on Dec 3^rd, 2007, 6:21am:


The ED article, even as a 2 part series, had to be watered down a lot to get it published. Key thing here is a comprehensive and distributed approach to noise, not just slapping a few guard rings down and keeping your fingers crossed.

With all the discussion and black magic opinions on guard rings swirling around, we did a foundry based study and got a bunch of empirical data in the lab.  It made a lot of people stop thinking of rings as the universal noise fix.

Key thing to remeber - rings are only 1-2 microns deep, noise goes underneath these, so you havent built a perfect wall. I do a PPT on the topic as part of industry training, and rings are only a small part of  a methodology that includes -- grounding, shielding, differential systems, path balancing, reducing generation sources, physical seperation, time and frequency division, impedance of power and ground, distributed filtering, selective bandwidth limiting, and a multitiude of others.

The talker/listener, (aggressor/victim, or whatever name you like) is a good approach, but is only the starting point.
Interference noise has been a big part of my technical design efforts, but the interesting thing is that I generally get dragged into the issue after somebody has a DOA chip due to noise. Beter to train the team prior to design. Its a training seminar that pays for itself multiple time over.