k-one wrote on Oct 30^th, 2007, 8:31am:


The Compact Model Council is expected to vote on a standard by the end of the year.  MM20 is already in the public domain; HV-EKV is another candidate (and I believe its Verilog-A code is available); HiSIM-LDMOS is the third candidate (from Hiroshima University).  HiSIM-LDMOS looks good from the presentations by the Japanese CMC members, but the code is held under non-disclosure agreement (NDA) until/unless it is accepted as the standard.

I'll also mention that spectre has a built-in model (spectre -help hvmos).

k-one wrote on Oct 31^st, 2007, 3:02am:


I've never used the built-in ldmos nor hvmos.  I also don't believe the HV-EKV or HiSIM-LDMOS models are installed in Spectre, but you might find HV-EKV in Verilog-A that you could run in Spectre.  A "release candidate" (SC1) of HiSIM-LDMOS is in the latest (2007.09) HSpice.

k-one wrote on Oct 31^st, 2007, 5:45pm:


Have you tried using level=66 parameters with Spectre's hvmos?  I may be completely misremembering something, but I thought that perhaps Cadence had licensed it from Synopsys.

MM20 is available in Verilog-A, and this will run in HSpice (assuming you have the VA compiler option with your copy of HSpice).

k-one wrote on Nov 1^st, 2007, 5:57am:


There's not a level for mm20, but you do something like:

.hdl "mos2002t.va"
x1 d g s b mos2002t vfb=-0.45 vfbd=-0.05

(This syntax is for the Verilog-A in an enhanced Spice3f5, but the syntax in HSpice is *very* similar, and I think they also support .model cards for VA.)

Verilog-A is a behavioral modeling language; you write the equations of the device in the language, and the simulator invokes a compiler and dynamically links the resulting object file.