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pnoise in spectreRF (Read 4096 times)
analog2000
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pnoise in spectreRF
Mar 05th, 2008, 3:00pm
 
Hi everyone,
Do you know if for pnoise analysis I have to have the clocks have 0v amplitude assigned. These clocks drive the gates of switches. The switches are part of the switched capacitor network ?
In Ken Kundert's app note on switched cap noise, the clock amplitude is shown to be 0v

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analog2000
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HdrChopper
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Re: pnoise in spectreRF
Reply #1 - Mar 5th, 2008, 5:56pm
 
Hi,

Everytime I run pnoise analysis I did it with the actual voltage levels for the clock voltage sources in order to properly run the transient analysis. I guess it is the only way the pnoise analysis can calculate the periodic quiescent operating point on both phases.

Tosei
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analog2000
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Re: pnoise in spectreRF
Reply #2 - Mar 6th, 2008, 2:45am
 
Hi Tosei,
I am with you, however, when I do a pnoise with a single mos switch and a 2pF capacitor. I expect ~47uV rms noise level. I do not get this correct # if I have an amplitude on the clock.
If I turn the clock amplitude off then I get the correct 47uV rms in nyquist band ?
thanks
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analog2000
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HdrChopper
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Re: pnoise in spectreRF
Reply #3 - Mar 7th, 2008, 5:20pm
 
Hi analog2000,

I do not understand exactly how you can get a noise different from zero when your switch is always off during both phases of your pnoise analysis....who is generating such noise? or may be I´m misunderstanding something?

Tosei
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analog2000
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Re: pnoise in spectreRF
Reply #4 - Mar 9th, 2008, 4:59pm
 
Hi Tosei,
For transient sims, of course, I have the clock with a certain amplitude running.  
It is only during the pnoise and pss analysis that the clock amplitude is 0
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analog2000
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ywguo
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Re: pnoise in spectreRF
Reply #5 - Mar 9th, 2008, 11:19pm
 
Hi analog2000,

Quote:
In Ken Kundert's app note on switched cap noise, the clock amplitude is shown to be 0v


I am not familiar with the syntax of spectre. However, an example from Ken Kundert's Simulating Switched-Capacitor Filters with SpectreRF is shown below. It is clear that the clocks Vphi1 and Vphi2 is not set to zero.

Code:
Vphi1 (phi1 gnd)		  vsource type=pulse val0=VSS val1=VDD
+					period=CLOCK_PERIOD width=CLOCK_WIDTH
+					rise=CLOCK_TRANS fall=CLOCK_TRANS
+					delay=CLOCK_TRANS-CLOCK_PERIOD
+					fundname="clock"
Vphi2 (phi2 gnd)		  vsource type=pulse val0=VSS val1=VDD
+					period=CLOCK_PERIOD width=CLOCK_WIDTH
+					rise=CLOCK_TRANS fall=CLOCK_TRANS
+					delay=CLOCK_TRANS-CLOCK_PERIOD/2
+					fundname="clock"

// PSS analysis (sets periodic operating point)
clockAlone pss fund=CLOCK_FREQ saveinit=yes maxacfreq=6MHz \
		writefinal="%C:r.ic" tstab=1.5ms swapfile="swap"
// Measure noise
unsmpldNoise (out gnd) pnoise start=100 stop=25kHz maxsideband=200
smpldNoise (out gnd) pnoise start=0_Hz stop=0.5*CLOCK_FREQ maxsideband=200 \
		noisetype=timedomain noisetimepoints=[0] numberofpoints=1 



Best regards,
Yawei

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