Hi,

The on resistor of the switch, either a complementary switch or NOT, is in series with a capacitor (or a parasitic capacitor). Thus it introduces a zero. So try to minimize the on resistance and make the zero high enough so that it doesn't affect the response of the switched capacitory integrator. In other words, make the circuitry work as if the switch is ideal.

Normally the response should be decided by the opamp GWB, so make the zero much higher than the GBW.

Best regards,
Yawei

Hi,

Sure the on-resistance of the switch varies with the input voltage. However, it doesn't varies in several orders. Just make the on-resistance low enough so that the variation cannot affect the transient/frequency response. In another word, make the largest on-resistance low enough.


Best regards,
Yawei

you tend to play the switch size, and its worst case on resistance,
against the charge injection of the switch,
against the size of the capacitor.

three things interacting...

You need a big enough capacitor that second order effects of charge injection are negligible.  Large capacitor for a fixed switch size reduces noise effects due to charge injection.

If thermal noise is an issue, this introduces a fourth variable. Bigger capacitor make for a lower inherent noise in the system for the same pole placements, because large C means lower R (or lower I, depending on architecture) and thus differnet noise.

Hallo Min,

Is it your question, How to simulate(evaluate) the Resistane of a switch?

best regards,

aamar

Hi min,

As for settling time I would just consider the Ron*C time constant of your switch-cap cap combination. Make sure the time the clock sets the switch ON is larger than at least 6-7 time constants so that the final value is reached with negligible errors.

Tosei