Monkeybad
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Posts: 31
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Hi,dandelion I guess this clamp circuit is used to limit the maximum voltage at the output of the error amp(Vcomp). In the initial time the VFB is low and is compared to the VBG (bandgap voltage, 1.25V). Because the high gain of the error amp the Vcomp is pulled up to VDD. This high voltage will cause the converter saturated, which means no matter what the current sensing voltage(VCS) is the output of the following comparator is always low. Therefore a clamp circuit is added to prevent it. The following figure is chopped from LM3430 datasheet of NS.
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