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sigma delta fractional-N pll (Read 1450 times)
rfmems
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sigma delta fractional-N pll
May 31st, 2008, 3:10pm
 
In a sigma delta fractional N pll, the fractional spurs are shaped by the SD modulator which controls the multi-modulus divider. In the literatures I found, the first order approximation of quantization noise always neglect the effect of the number of bits of MMD and assume the quantization noise white.

My questions are: (1) How does the bit-number of MMD effect the quantization noise and/or frational spur?
                         (2) How can the fractional spurs be treated as noise or even white noise as in numerous literatures?
                         (3) When the PLL has a fixed fractional division factor N+x, the quantization error should be x and 1-x with different probability density. How can this be treated same as SD ADC and get a rms value of 1/12?

Thanks in advance.
chenyan


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