The Designer's Guide Community
Forum
ForumVerilog-AMSAnalysisModelingDesignTheory
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Jul 17th, 2024, 1:20am
 
  HomeHelpSearchLoginRegisterPM to admin    
The Designer's Guide Community Forum › Measurements › Phase Noise and Jitter Measurements › Pll bandwidth
‹ Previous topic | Next topic ›
Pages: 1
Send Topic Print
Pll bandwidth (Read 2903 times)
lvlei0309
New Member
*
Offline



Posts: 2
Pll bandwidth
Jun 04th, 2008, 11:01pm  
   Wide bandwidth
▸ VCO noise suppressed, CP noise passed
�� Narrow bandwidth
▸ CP noise suppressed, VCO noise passed


I have saw this on an IEEE presentation, is that right? I think it is wrong.
Back to top
 
 
View Profile   IP Logged
rfmems
Senior Member
****
Offline



Posts: 121
Re: Pll bandwidth
Reply #1 - Jun 5th, 2008, 12:21am  
why it is wrong?
Back to top
 
 
View Profile   IP Logged
lvlei0309
New Member
*
Offline



Posts: 2
Re: Pll bandwidth
Reply #2 - Jun 5th, 2008, 3:19am  
CP noise transfer function is low pass, and VCO noise is high pass. so BW is high, CP noise is surpressed.
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
‹ Previous topic | Next topic ›
« Home ‹ Board
The Designer's Guide Community Forum » Powered by YaBB 2.2.2!
YaBB © 2000-2008. All Rights Reserved.
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.